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74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset
May 1993 Revised March 1999
74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
The LVX174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops.
Features
s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance
Ordering Code:
Order Number 74LVX174M 74LVX174SJ 74LVX174MTC Package Number M16A M16D MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names D0-D5 CP MR Q0-Q5 Description Data Inputs Clock Pulse Input Master Reset Input Outputs
(c) 1999 Fairchild Semiconductor Corporation
DS011607.prf
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74LVX174
Truth Table
Inputs Operating Mode MR Reset (Clear) Load `1' Load `0'
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition
Outputs Dn X H L Qn L H L
CP
L H H

X
Logic Diagram
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74LVX174
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Diode Current (IIK) VI = -0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) Power Dissipation (PD) 50 mA -65C to +150C 180 mW 25 mA -20 mA +20 mA -0.5V to VCC + 0.5V -20 mA -0.5V to 7V -0.5V to +7.0V
Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Input Rise and Fall Time (t/V) 2.0V to 3.6V 0V to 5.5V 0V to VCC -40C to +85C 0 ns/V to 100 ns/V
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VOH HIGH Level Output Voltage VOL LOW Level Output Voltage IIN ICC Input Leakage Current Quiescent Supply Current VCC 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 2.0 3.0 3.0 3.6 3.6 1.9 2.9 2.58 0.0 0.0 0.1 0.1 0.36 0.1 4.0 2.0 3.0 TA = +25C Min 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.48 0.1 0.1 0.44 1.0 40.0 A A V VIN = VIL or VIH V Typ Max TA = -40C to +85C Min 1.5 2.0 2.4 0.5 0.8 0.8 VIN = VIL or VIH IOH = -50 A IOH = -50 A IOH = -4 mA IOL = 50 A IOL = 50 A IOL = 4 mA VIN = 5.5V or GND VIN = VCC or GND V V Max Units Conditions
Noise Characteristics (Note 3)
Symbol VOLP VOLV VIHD VILD Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage VCC (V) 3.3 3.3 3.3 3.3 TA = 25C Typ 0.3 -0.3 Limit 0.5 -0.5 2.0 0.8 Units V V V V CL (pF) 50 50 50 50
Note 3: (Input tr = tf = 3 ns)
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74LVX174
AC Electrical Characteristics
Symbol tPLH tPHL Parameter Propagation Delay Time CP to Qn tPHL Propagation Delay MR to Qn 3.3 0.3 tS tH tREC tW tW fMAX Setup Time Dn to CP Hold Time Dn to CP Removal Time MR to CP Clock Pulse Width MR Pulse Width Maximum Clock Frequency 3.3 0.3 tOSLH tOSHL Output to Output Skew (Note 4) 2.7 3.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 7.5 5.0 0 0 4.5 3.0 6.5 5.0 6.5 5.0 65 45 115 65 130 60 180 95 1.5 1.5 3.3 0.3 2.7 VCC (V) 2.7 TA = +25C Min Typ 7.6 10.1 5.9 8.4 7.9 10.4 6.2 8.7 Max 14.5 18.0 9.3 12.8 15.0 18.5 9.7 13.2 TA = -40C to +85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 8.5 6.0 0 0 4.5 3.0 7.5 5.0 7.5 5.0 55 40 95 55 1.5 1.5 ns MHz ns 15 50 15 50 50 ns ns Max 17.5 21.0 11.0 14.5 18.5 22.0 11.5 15.0 ns ns Units CL (pF) 15 50 15 50 15 50 15 50
Note 4: Parameter guaranteed by design. tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|
Capacitance
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance (Note 5) Parameter Min TA = +25C Typ 4 29 Max 10 TA = -40C to +85C Min Max 10 pF pF Units
Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
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74LVX174
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
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74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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